Daniel Teng

     Daniel Teng  B.Sc., M.Sc., Ph.D.

    Assistant Professor of Electrical and Computer Engineering

    Biography

    Dr. Teng has been involved in IC design over 10 years. With the motivation of bringing the industrial experience into academia, he joined the University of Saskatchewan in 2004. His field of interests include interconnection techniques, low-power design and high-level power estimation.

    Dr. Teng is also recognized for his enthusiasm in pursuing collaboration with industrial research sector.

    Publications

    Selected Journal Papers

    [1] D.H.Y. Teng, R. Bolton and D.E. Dodds, 2001, "A VHDL Library for Current-Mode CMOS Multiple-Valued Logic", Multiple Valued Logic - an International Journal, Vol. 7, pp. 49-73. [PDF]

    Conference Publications

    [1] Daniel H. Y. Teng and Ronald J. Bolton, 2005, "PERFORMANCE EVALUATION OF MULTIPLE-VALUED LOGIC CIRCUITS USING STATISTICAL APPROACH", Proceedings of IEEE Canadian Conference on Electrical and Computer Engineering, May 1-4, Saskatoon, Canada, pp. 0300-0303. [PDF]

    Research Grants

    Graduate Students

    Song Hu
    M.Sc., Low-power CMOS Quadrature Digital Upconverter IP Block
    Peng Huang
    M.Sc., TBD
    Son Nguyen
    Ph.D., Wireless Intra-Chip Communication for 3D-ICs (Co-supervision with Dr. A. Dinh)
    Gary Wang
    Ph.D., TBD

    Teaching

    EE 201
    Electric and Magnetic Circuit II
    http://www.engr.usask.ca/classes/EE/201/
    EE 332
    Real-Time Computing

    http://www.engr.usask.ca/classes/EE/332/
    EE 802
    Advanced VLSI Design and Analysis

    http://www.engr.usask.ca/classes/EE/802/
    EE 898
    Low Power Integrated Circuit Design

    http://www.engr.usask.ca/classes/EE/898/t1/a/
    EE 899
    Embedded Systems and System-on-Chip Design

    http://www.engr.usask.ca/classes/EE/899/

    Research Projects

    Interconnection techniques and analysis for system-on-chip

    Low-power multiprocessor design architecture

    Multiple-valued logic synthesis and analysis